PIC18F86J11-I/PT【PDF 74/107 页】IC PIC MCU FLASH 32KX16 80TQFP

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Sheet目录3850

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2007-2012 Microchip Technology Inc.

DS39778E-page 69

PIC18F87J11 FAMILY

6.1.3

PIC18F8XJ11/8XJ16 PROGRAM

MEMORY MODES

The 80-pin devices in this family can address up to a

total of 2 Mbytes of program memory. This is achieved

through the External Memory Bus (EMB). There are two

distinct operating modes available to the controllers:

Microcontroller (MC)

Extended Microcontroller (EMC)

The program memory mode is determined by setting

the EMBx Configuration bits (CONFIG3L<5:4>), as

shown in Register 6-1. (See also Section 25.1

“Configuration Bits”

for additional details on the

device Configuration bits.)

The program memory modes operate as follows:

The Microcontroller Mode accesses only on-chip

Flash memory. Attempts to read above the top of

on-chip memory causes a read of all ‘0’s (a NOP

instruction).

The Microcontroller mode is also the only operating

mode available to 64-pin devices.

The Extended Microcontroller Mode allows

access to both internal and external program

memories as a single block. The device can

access its entire on-chip program memory; above

this, the device accesses external program

memory up to the 2-Mbyte program space limit.

Execution automatically switches between the

two memories as required.

The setting of the EMBx Configuration bits also con-

trols the address bus width of the External Memory

Bus. This is covered in more detail in Section 8.0

“External Memory Bus”

In all modes, the microcontroller has complete access

to data RAM.

Figure 6-3 compares the memory maps of the different

program memory modes. The differences between

on-chip and external memory access limitations are

more fully explained in Table 6-2.

REGISTER 6-1:

CONFIG3L: CONFIGURATION REGISTER 3 LOW

R/WO-1

U-0

WAIT(1)

BW(1)

EMB1(1)

EMB0(1)

EASHFT(1)

—

bit 7

bit 0

Legend:

WO = Write-Once bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

WAIT:

External Bus Wait Enable bit(1)

= Wait states on the external bus are disabled

= Wait states on the external bus are enabled and selected by MEMCON<5:4>

bit 6

BW:

Data Bus Width Select bit(1)

= 16-Bit Data Width modes

= 8-Bit Data Width modes

bit 5-4

EMB1:EMB0:

External Memory Bus Configuration bits(1)

= Microcontroller mode, external bus disabled

= Extended Microcontroller mode, 12-bit address width for external bus

= Extended Microcontroller mode, 16-bit address width for external bus

= Extended Microcontroller mode, 20-bit address width for external bus

bit 3

EASHFT:

External Address Bus Shift Enable bit(1)

= Address shifting is enabled – external address bus is shifted to start at 000000h

= Address shifting is disabled – external address bus reflects the PC value

bit 2-0

Unimplemented:

Read as ‘0’

Note 1:

These bits are implemented only on 80-pin devices.

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